{ @(#)M		1.1  src/bos/usr/sbin/perf/pmapi/events/masterPOWERCOMPAT/mkevs, pmapi, bos61H 04/01/09 07:05:52
{ IBM_PROLOG_BEGIN_TAG 
{ This is an automatically generated prolog. 
{  
{ bos720 src/bos/usr/sbin/perf/pmapi/events/POWERCOMPAT.evs 1.1.1.1 
{  
{ Licensed Materials - Property of IBM 
{  
{ COPYRIGHT International Business Machines Corp. 2009,2012 
{ All Rights Reserved 
{  
{ US Government Users Restricted Rights - Use, duplication or 
{ disclosure restricted by GSA ADP Schedule Contract with IBM Corp. 
{  
{ IBM_PROLOG_END_TAG 


13,13,13,14,1,1

{ counter 1 }
#0,v,g,n,n,n,PM_1PLUS_PPC_CMPL,one or more ppc  instructions  completed
##000F2
one or more ppc  instructions finished
#1,v,g,n,s,n,PM_ANY_THRD_RUN_CYC,Any thread in run_cycles  (was one thread in run_cycles)
##000FA
One of threads in run_cycles 
#2,v,g,n,s,n,PM_CYC,Cycles 
##000F0
Cycles
#3,v,g,n,n,n,PM_FLOP,Floating Point Operations Finished
##000F4
Floating Point Operations Finished
#4,v,g,n,n,n,PM_GCT_NOSLOT_CYC,Pipeline empty (No itags assigned , no GCT slots used)
##000F8
No itags assigned 
#5,v,g,n,n,n,PM_IERAT_MISS,IERAT Reloaded  (Miss)
##000F6
Cycles Instruction ERAT was reloaded
#6,u,g,n,n,m,PM_MRK_BR_TAKEN_CMPL,Marked Branch Taken
##000E2
Marked Branch Taken completed
#7,u,g,n,n,m,PM_MRK_INST_DISP,Marked Instruction dispatched
##000E0
The thread has dispatched a randomly sampled marked instruction
#8,u,g,n,n,m,PM_MRK_L1_ICACHE_MISS,Marked L1 Icache Miss
##000E4
sampled Instruction suffered an icache Miss
#9,u,g,n,n,m,PM_MRK_L1_RELOAD_VALID,Marked demand reload
##000EA
Sampled Instruction had a data reload
#10,u,g,n,n,m,PM_THRESH_EXC_256,Threshold counter exceed a count of 256
##000E8
Architecture provides a thresholding counter in MMCRA, it has a start and stop events to configure and a programmable threshold, this event increments when the threshold exceeded a count of 256
#11,u,g,n,n,m,PM_THRESH_EXC_4096,Threshold counter exceed a count of 4096
##000E6
Architecture provides a thresholding counter in MMCRA, it has a start and stop events to configure and a programmable threshold, this event increments when the threshold exceeded a count of 4096
#12,u,g,t,n,m,PM_THRESH_MET,threshold exceeded
##000EC
Threshold exceeded 

$$$$$$$$

{ counter 2 }
#0,v,g,n,n,n,PM_BR_TAKEN_CMPL,Branch Taken
##000FA
New  event for Branch Taken
#1,v,g,n,n,n,PM_DATA_FROM_L2MISS,Demand LD - L2 Miss (not L2 hit)
##000FE
Demand LD - L2 Miss (not L2 hit)
#2,v,g,n,n,n,PM_EXT_INT,external interrupt
##000F8
external interrupt
#3,v,g,n,n,n,PM_INST_DISP,Number of PPC Dispatched
##000F2
Number of PPC Dispatched
#4,v,g,n,n,n,PM_L1_ICACHE_MISS,Demand iCache Miss
##000FC
Demand iCache Miss
#5,v,g,n,n,n,PM_LSU_DERAT_MISS,DERAT Reloaded  (Miss)
##000F6
DERAT Reloaded due to a DERAT miss
#6,u,g,n,n,m,PM_MRK_DATA_FROM_L3MISS,The processor's data cache was reloaded from a location other than the local core's L3  due to a marked load
##000E4
sampled load resolved beyond L3
#7,u,g,n,n,m,PM_MRK_DATA_FROM_MEM,The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a marked load
##000E0
sampled load resolved from memory
#8,u,g,n,n,m,PM_MRK_LD_MISS_L1,Marked DL1 Demand Miss counted at exec time
##000E2
Marked DL1 Demand Miss
#9,v,g,n,n,n,PM_RUN_CYC,Run_cycles
##000F4
Run_cycles
#10,v,g,n,n,n,PM_ST_FIN,Store Instructions Finished (store sent to nest)
##000F0
Store Instructions Finished
#11,u,g,n,n,m,PM_THRESH_EXC_32,Threshold counter exceeded a value of 32
##000E6
Architecture provides a thresholding counter in MMCRA, it has a start and stop events to configure and a programmable threshold, this event increments when the threshold exceeded a count of 32
#12,u,g,n,n,m,PM_THRESH_EXC_512,Threshold counter exceeded a value of 512 Architecture provides a thresholding counter in MMCRA, it has a start and stop events to configure and a programmable threshold, this event increments when the threshold exceeded a count of 512
##000E8
Threshold counter exceeded a value of 512 Architecture provides a thresholding counter in MMCRA, it has a start and stop events to configure and a programmable threshold, this event increments when the threshold exceeded a count of 512

$$$$$$$$

{ counter 3 }
#0,v,g,n,n,n,PM_DATA_FROM_L3MISS,Demand LD - L3 Miss (not L2 hit and not L3 hit)
##000FE
Demand LD - L3 Miss (not L2 hit and not L3 hit)
#1,u,g,n,n,n,PM_DTLB_MISS,Data PTEG Reloaded  (DTLB Miss)
##000FC
Data PTEG reload
#2,v,g,n,n,n,PM_INST_DISP,Number of PPC Dispatched
##000F2
Number of PPC Dispatched
#3,u,g,n,n,n,PM_INST_FROM_L3MISS,Inst from L3 miss
##000FA
A Instruction cacheline request resolved from a location that was beyond the local L3 cache
#4,v,g,n,n,n,PM_L1_DCACHE_RELOAD_VALID,DL1  reloaded due to Demand Load 
##000F6
DL1  reloaded due to Demand Load 
#5,u,g,n,n,m,PM_MRK_BR_MPRED_CMPL,Marked Branch Mispredicted
##000E4
Marked Branch Mispredicted
#6,u,g,n,n,m,PM_MRK_DERAT_MISS,Erat Miss (TLB Access) All page sizes
##000E6
Erat Miss (TLB Access) All page sizes
#7,u,g,n,n,m,PM_MRK_ST_CMPL,Marked store completed
##000E2
marked store completed and sent to nest
#8,v,g,n,n,n,PM_ST_MISS_L1,Store Missed L1
##000F0
Store Missed L1
#9,u,g,n,s,n,PM_TB_BIT_TRANS,timebase event
##000F8
timebase event
#10,v,g,n,n,n,PM_THRD_CONC_RUN_INST,Concurrent Run Instructions
##000F4
PPC Instructions Finished when both threads in run_cycles
#11,u,g,n,n,m,PM_THRESH_EXC_1024,Threshold counter exceeded a value of 1024 Architecture provides a thresholding counter in MMCRA, it has a start and stop events to configure and a programmable threshold, this event increments when the threshold exceeded a count of 1024
##000EA
Threshold counter exceeded a value of 1024 Architecture provides a thresholding counter in MMCRA, it has a start and stop events to configure and a programmable threshold, this event increments when the threshold exceeded a count of 1024
#12,u,g,n,n,m,PM_THRESH_EXC_64,Threshold counter exceeded a value of 64 Architecture provides a thresholding counter in MMCRA, it has a start and stop events to configure and a programmable threshold, this event increments when the threshold exceeded a count of 64
##000E8
Threshold counter exceeded a value of 64 Architecture provides a thresholding counter in MMCRA, it has a start and stop events to configure and a programmable threshold, this event increments when the threshold exceeded a count of 64

$$$$$$$$

{ counter 4 }
#0,v,g,n,n,n,PM_1PLUS_PPC_DISP,Cycles at least one Instr Dispatched
##000F2
Cycles at least one Instr Dispatched
#1,v,g,n,n,n,PM_BR_MPRED_CMPL,Number of Branch Mispredicts
##000F6
Number of Branch Mispredicts
#2,v,g,n,n,n,PM_DATA_FROM_MEM,Data cache reload from memory (including L4)
##000FE
data from Memory
#3,v,g,n,n,n,PM_FLUSH,Flush (any type)
##000F8
Flush (any type)
#4,v,g,n,n,n,PM_ITLB_MISS,ITLB Reloaded
##000FC
ITLB Reloaded (always zero on POWER6)
#5,v,g,n,n,n,PM_LD_MISS_L1,Load Missed L1
##000F0
Load Missed L1
#6,u,g,n,n,m,PM_MRK_DATA_FROM_L2MISS,Data cache reload L2 miss
##000E8
sampled load resolved beyond L2
#7,u,g,n,n,m,PM_MRK_DTLB_MISS,Marked dtlb miss
##000E4
sampled Instruction dtlb miss
#8,u,g,n,n,m,PM_MRK_INST_CMPL,marked instruction completed
##000E0
Marked group complete
#9,u,g,n,n,m,PM_MRK_INST_FROM_L3MISS,sampled instruction missed icache and came from beyond L3 A Instruction cacheline request for a marked/sampled instruction resolved from a location that was beyond the local L3 cache
##000E6
sampled instruction missed icache and came from beyond L3 A Instruction cacheline request for a marked/sampled instruction resolved from a location that was beyond the local L3 cache
#10,v,g,n,n,n,PM_RUN_INST_CMPL,Run_Instructions
##000FA
Run_Instructions
#11,v,g,n,n,n,PM_RUN_PURR,Run_PURR
##000F4
Run_PURR
#12,u,g,n,n,m,PM_THRESH_EXC_128,Threshold counter exceeded a value of 128
##000EA
Architecture provides a thresholding counter in MMCRA, it has a start and stop events to configure and a programmable threshold, this event increments when the threshold exceeded a count of 128
#13,u,g,n,n,m,PM_THRESH_EXC_2048,Threshold counter exceeded a value of 2048
##000EC
Architecture provides a thresholding counter in MMCRA, it has a start and stop events to configure and a programmable threshold, this event increments when the threshold exceeded a count of 2048

$$$$$$$$

{ counter 5 }
#0,v,g,n,n,n,PM_RUN_INST_CMPL,Run_Instructions
##00009
Run_Instructions

$$$$$$$$

{ counter 6 }
#0,v,g,n,n,n,PM_RUN_CYC,Run_cycles
##00005
Run_cycles