/* IBM_PROLOG_BEGIN_TAG                                                   */
/* This is an automatically generated prolog.                             */
/*                                                                        */
/* bos720 src/bos/kernel/sys/ethernet_mibs.h 1.6                          */
/*                                                                        */
/* Licensed Materials - Property of IBM                                   */
/*                                                                        */
/* COPYRIGHT International Business Machines Corp. 1993,2003              */
/* All Rights Reserved                                                    */
/*                                                                        */
/* US Government Users Restricted Rights - Use, duplication or            */
/* disclosure restricted by GSA ADP Schedule Contract with IBM Corp.      */
/*                                                                        */
/* IBM_PROLOG_END_TAG                                                     */
/* @(#)63	1.6  src/bos/kernel/sys/ethernet_mibs.h, snmp, bos720 11/11/03 15:52:18 */
/*
 * COMPONENT_NAME: (SNMP) Simple Network Management Protocol Daemon
 *
 * FUNCTIONS:
 *
 * ORIGINS: 27
 *
 * (C) COPYRIGHT International Business Machines Corp. 1993
 * All Rights Reserved
 * US Government Users Restricted Rights - Use, duplication or
 * disclosure restricted by GSA ADP Schedule Contract with IBM Corp.
 *
 * Licensed Material - Property of IBM
 *
 * FILE:        /usr/include/sys/ethernet_mibs.h
 */

#ifndef _H_Ethernet_MIBS
#define _H_Ethernet_MIBS

#include  <sys/machine.h>
#include  <sys/generic_mibs.h>


/* The Ethernet-like Statistics group */
typedef struct  Dot3StatsEntry  {
#define ETHER_ALIGN_ERRS	30
	__ulong32_t  align_errs;	/* dot3StatsAlignmentErrors */

#define ETHER_FCS_ERRS		31
	__ulong32_t  fcs_errs;		/* dot3StatsFCSErrors */

#define ETHER_S_COLL_FRAMES	32
	__ulong32_t  s_coll_frames;	/* dot3StatsSingleCollisionFrames */

#define ETHER_M_COLL_FRAMES	33
	__ulong32_t  m_coll_frames;	/* dot3StatsMultipleCollisionFrames */

#define ETHER_SQETEST_ERRS	34
	__ulong32_t  sqetest_errs;	/* dot3StatsSQETestErrors */

#define ETHER_DEFER_TX		35
	__ulong32_t  defer_tx;		/* dot3StatsDeferredTransmissions */

#define ETHER_LATE_COLLISIONS	36
	__ulong32_t  late_collisions;	/* dot3StatsLateCollisions */

#define ETHER_EXCESS_COLLISIONS	37
	__ulong32_t  excess_collisions;/* dot3StatsExcessiveCollisions */

#define ETHER_MAC_TX_ERRS	38
	__ulong32_t  mac_tx_errs;	/* dot3StatsInternalMacTransmitErrors */

#define ETHER_CARRIERS_SENSE	39
	__ulong32_t  carriers_sense;	/* dot3StatsCarrierSenseErrors */

#define ETHER_LONG_FRAMES	40
	__ulong32_t  long_frames;	/* dot3StatsFrameTooLongs */

#define ETHER_MAC_RX_ERRS	41
	__ulong32_t  mac_rx_errs;	/* dot3StatsInternalMacReceiveErrors */
} Dot3StatsEntry_t;


/* The Ethernet-like Collision Statistics Group */
typedef struct  Dot3CollEntry  {
#define ETHER_COUNT		50
	__ulong32_t   count[16];	/* dot3CollCount */

#define ETHER_FREQ		51
	__ulong32_t   freq[16];	/* dot3CollFrequencies */
}  Dot3CollEntry_t;


typedef struct ethernet_mibs  {
	Dot3StatsEntry_t  Dot3StatsEntry;
	Dot3CollEntry_t	  Dot3CollEntry;
}  ethernet_mibs_t;

typedef struct ethernet_all_mib  {
	generic_mib_t     Generic_mib;
	ethernet_mibs_t   Ethernet_mib;
} ethernet_all_mib_t;


/* 802.3 Tests */
#define  ETH_MIB_INITERROR		80231 
#define  ETH_MIB_LOOPBACKERROR		80232


/* 802.3 Hardware Chipsets -- dot3ChipSets */
/* AMD Chipsets */
#if BYTE_ORDER==BIG_ENDIAN
#define  ETH_MIB_AMD7990	"\000\000\000\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\001\000\000\000\001\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#else
#define  ETH_MIB_AMD7990	"\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\001\000\000\000\001\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#endif /* BYTE_ORDER==BIG_ENDIAN */

#if BYTE_ORDER==BIG_ENDIAN
#define  ETH_MIB_AMD79900	"\000\000\000\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\001\000\000\000\002\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#else
#define  ETH_MIB_AMD79900	"\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\001\000\000\000\002\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#endif /* BYTE_ORDER==BIG_ENDIAN */

#if BYTE_ORDER==BIG_ENDIAN
#define  ETH_MIB_AMD79C940	"\000\000\000\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\001\000\000\000\003\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#else
#define  ETH_MIB_AMD79C940	"\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\001\000\000\000\003\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#endif /* BYTE_ORDER==BIG_ENDIAN */

/* Intel Chipsets */
#if BYTE_ORDER==BIG_ENDIAN
#define  ETH_MIB_Intel82586	"\000\000\000\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\002\000\000\000\001\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#else
#define  ETH_MIB_Intel82586	"\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\002\000\000\000\001\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#endif /* BYTE_ORDER==BIG_ENDIAN */

#if BYTE_ORDER==BIG_ENDIAN
#define  ETH_MIB_Intel82596	"\000\000\000\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\002\000\000\000\002\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#else
#define  ETH_MIB_Intel82596	"\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\002\000\000\000\002\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#endif /* BYTE_ORDER==BIG_ENDIAN */

/* Seeq Chipsets */
#if BYTE_ORDER==BIG_ENDIAN
#define  ETH_MIB_Seeq8003	"\000\000\000\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\003\000\000\000\001\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#else
#define  ETH_MIB_Seeq8003	"\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\003\000\000\000\001\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#endif /* BYTE_ORDER==BIG_ENDIAN */

/* National Chipsets */
#if BYTE_ORDER==BIG_ENDIAN
#define  ETH_MIB_National8390	"\000\000\000\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\004\000\000\000\001\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#else
#define  ETH_MIB_National8390	"\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\004\000\000\000\001\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#endif /* BYTE_ORDER==BIG_ENDIAN */

#if BYTE_ORDER==BIG_ENDIAN
#define  ETH_MIB_NationalSonic	"\000\000\000\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\004\000\000\000\002\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#else
#define  ETH_MIB_NationalSonic	"\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\004\000\000\000\002\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#endif /* BYTE_ORDER==BIG_ENDIAN */

/* Fujitsu Chipsets */
#if BYTE_ORDER==BIG_ENDIAN
#define  ETH_MIB_Fujitsu86950	"\000\000\000\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\005\000\000\000\001\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#else
#define  ETH_MIB_Fujitsu86950	"\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\005\000\000\000\001\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#endif /* BYTE_ORDER==BIG_ENDIAN */

#if BYTE_ORDER==BIG_ENDIAN
#define  ETH_MIB_Fujitsu86960	"\000\000\000\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\005\000\000\000\002\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#else
#define  ETH_MIB_Fujitsu86960	"\013\000\000\000\001\000\000\000\003\000\000\000\006\000\000\000\001\000\000\000\002\000\000\000\001\000\000\000\012\000\000\000\007\000\000\000\010\000\000\000\005\000\000\000\002\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
#endif /* BYTE_ORDER==BIG_ENDIAN */

#endif  /* _H_Ethernet_MIBS */