ISO8859-1Ah'?< #D `B ? 7 ( : `  7 7 : &: aA D # / D Y n        2$ O t     -<\q" 0 %$;%`.'.9h'$ ')G"q+-# 0+N&z" + ,  8 M -l%!,#2V-r!$!@1[ ! !"# $$'%L&['v(()'*+,#$-%H.9n/6061'2>3Z4u56789#:!!;C<W i%vrJ .#6rZrr@{S/@`a[M\\:c3 |2 r s!V\!o"'F"""<#4#>/#sE#t#1$^&$C$$@%:%3& 4&=O&rw&':'()/i)*9|*y+8+l,O,-Qi-O.]./eZ0;0s^0 p1 1 26 2 3]/3R4;4d.445ot56r9607-B7^B7,7$8-86f8d,8?8 898!f9q"D9#l:$w:%>;&n;A'];(7<)?0@>P11>2K?34@4H@D54@6K@7GA8HAV9CA:ZA;(B><GBg6BBBC)C8CGC[CjC|CCCCCCCD D- D; DH DSD]DqDD2-port 100GbE RoCE QSFP28 PCIe 3.0 x16 Adapter (b31513101410f704)DMA pages for regular adapter operationRx hash functionPCIe3 2 PORT 25/10 Gb NIC&ROCE SFP28 ADAPTER (b315151014101e06)PCIe3 2 PORT 10 Gb NIC&ROCE SR/Cu ADAPTER (b315151014101f06)2-port 100GbE RoCE QSFP28 PCIe 3.0 x16 Adapter VF (b31514101410f704)PCIe3 2 PORT 25/10 Gb NIC&ROCE SFP28 ADAPTER VF (b315161014101e06)PCIe3 2 PORT 10 Gb NIC&ROCE SR/Cu ADAPTER VF (b315161014101f06)PCIe4 2-port 100GbE RoCE Adapter x16 (b315191014103506)PCIe4 2-port 100GbE RoCE Adapter x16 VF (b3151a1014103506)Firmware image layout typePCIe4 1-port 200GbE RoCE Adapter x16 (b3151d101410a406)PCIe4 2-port 100GbE RoCE Adapter x16 (b3151d101410a606)PCIe4 1-port 200GbE RoCE Adapter x16 VF (b3151e101410a406)PCIe4 2-port 100GbE RoCE Adapter x16 VF (b3151e101410a606)PCIe3 2 PORT 25/10/1 Gb NIC&ROCE SFP28 ADAPTER (b315151014101e06)PCIe3 2 PORT 25/10/1 Gb NIC&ROCE SFP28 ADAPTER VF (b315161014101e06)RX WQE sizeBus memory address 0Bus memory address 1Bus memory address 2ROM memory addressBus interrupt levelInterrupt priorityRequest checksum offloadRequest Rx checksum offloadRequest Tx checksum offloadRequest IP checksum offloadRequest TCP checksum offloadRequest UDP checksum offloadDelay open until link state is knownRequest flow controlFlow control high water markFlow control low water markReceive pause framesTransmit pause framesInterrupt event coalesce counterInterrupt event coalesce timer (microseconds)Request IPV6 stateless offloadsRequest jumbo framesRequested jumbo frame sizeRequest Rx TCP segment aggregationAdapter TypeNIC EnablementRx TCP segment aggregation minimum pkt thresholdRequest Tx TCP segment offloadDevice IDRequested Media speedManagement queue maximum event countRequested number of management queuesRequested number of poll queuesRequested number of Rx queuesRequested number of Tx queuesResponse queue entries processed per interruptRx packets chained for stack processingMax Rx buffer writes before hardware send callRx queue maximum packet countRx packets per Rx complete notificationMax poll events that can be receivedEEH event poll timer (seconds)Error poll timer (seconds)Link poll timer (seconds)Statistics poll timer (seconds)Tx packets chained for adapter processingTx completions processed per eventResponse events per Tx completion discoveryDelay free of Tx packet mbufsTx completion notification injection intervalTx packets sent per transmit threadTx queue maximum packet countTx completions before hardware notificationSoftware Tx queue maximum packet countRequest alternate Ethernet addressAlternate Ethernet addressMax MGT completions processed per RSP eventMGT completions before hardware notificationNumber of NIC queuesEthernet demuxer device driverEthernet hardware specific statistics programVPD not presentOpen firmware MAC address not presentPerform link reset during suspendMSI interrupt typeRSP completions before hardware notificationMax RSP events that can be receivedEnable config debug tracingPercentage where RX buffers is considered lowFirmware update is desiredPath to firmware image for updateType of reset to be used for adapterPreload ethernet demuxer firstConfig method is parallel safeDynamic DMA window supportRequest partial checksum offload for IP fragmentsReceive completion limitVNIC modeLink status delay timer (seconds)Link status delay modeTx timeout (seconds)EEH reset typeEEH reset delay (seconds)EEH config space delay (miliseconds)EEH PIO bypassVPD timeout (microseconds)VPD ready delay (microseconds)Maximum number of interrupts to allocateSend transmit packets on receive threadTx large send minimum MSS modeTx large send minimum MSS sizeResponse interrupts posted to kprocSupported reset types during recoveryEnables or Disables Enhanced Transmission Selection (ETS)Minimum number of Standard TxQs required to enable ETSMinimum number of Priority TxQs required to enable ETSDesired I/O page size for DMA transfersMemory affinity PCI SRAD IDMemory affinity enablementNearest SRAD ID to PCI deviceAffinity enablementDMA memory affinity enablementMemory affinity enablementProcess affinity enablementTransmit processing posted to kprocRequest tunnel stateless offloadsConfiguration stateFlow control typeRequest RDMARequested number of RDMA event queuesSpecifies the number of DMA pages allocated for regular adapter operation.Specifies the Rx hash function.Specifies the supported firmware image layout.Specifies the RX WQE size in bytes.During config, this attribute is configured with the BAR address to be used for the BAR 0 address in config space.During config, this attribute is configured with the BAR address to be used for the BAR 1 address in config space.During config, this attribute is configured with the BAR address to be used for the BAR 2 address in config space.During config, this attribute is configured with the Expansion ROM address to be used for the Exansion ROM in config space.During config, this attribute is configured with the first source number allocated.Specifies the interrupt priority level at which the driver runs.This attribute is used to disable all checksum offload capabilities. Enabling this attribute allows all checksum offload to be enabled or disabled based on the individual checksum offload settings.Enables and disables receive checksum offload capabilities if checksum offload has been enabled.Enables and disables transmit checksum offload capabilities if checksum offload has been enabled.Enables and disables IP checksum offload capabilities if checksum offload has been enabled.Enables and disables TCP checksum offload capabilities if checksum offload has been enabled.Enables and disables UDP checksum offload capabilities if checksum offload has been enabled.Specifies to delay the open until the link state is known.This attribute is used to disable all flow control pause frames capabilities. Enabling this attribute allows all flow control pause frames be enabled or disabled based on the individual flow control pause frames settings.Specifies the receive flow control high water mark.Specifies the receive flow control low water mark.Enables and disables receive flow control pause frames capabilities if flow control pause frames has been enabled.Enables and disables transmit flow control pause frames capabilities if flow control pause frames has been enabled.Specifies the number of interrupt triggering events to delay before generating an interrupt.Specifies the amount of time to delay before generating an interrupt when an interrupt triggering event occurs.Specifies to apply all the IPv4 offload capabilities settings to IPv6.Enables and disables jumbo frames.Specifies the jumbo frame size when jumbo frames is enabled.Enable and disables receive TCP segment aggregation.Specifies the type of adapter being configured.Specifies whether to use the NIC set of ODM attributes during config.Specifies the minimum number of packets needed in order for receive TCP segment aggregation to coalesce the packets.Enable and disables transmit TCP segment offload.Specifies the device ID of the device.Specifies the desired media speed with which to config the adapter.Specifies the maximum number of management events that can be received such that no more can be received without first freeing management events.Specifies the desired number of management queues to be created.Specifies the desired number of poll queues to be created.Specifies the desired number of NIC receive queues.Specifies the desired number of NIC transmit queues.Specifies the maximum number of response entries to process per interupt event.Specifies the maximum number of receive packets to chain together before sending the chain up the stack for processing.Specifies the maximum number of receive buffers to write out before sending the hardware a notification that it can use the buffers that were written out.Specifies the maximum number of receive packets that can be received such that no more can be received without first freeing received packet resources back to the hardware.Specifies the max number of receive complete entries to process before sending the hardware a notification that it can use the receive complete entries that were processed.Specifies the max number of poll events that can be received such that no more can be received without first freeing poll event resources back to the hardware.Specifies the timer interval, in seconds, to check for a frozen slot. A value of zero disables the timer.Specifies the timer interval, in seconds, to call the hardware to check for error conditions. A value of zero disables the timer.Specifies the timer interval, in seconds, to call the hardware to check for link status. A value of zero disables the timer.Specifies the timer interval, in seconds, to call the hardware to collect statistics. A value of zero disables the timer.Specifies the maximum number of transmit packets to write out before sending the hardware a notification that it can send the packets that were written out.Specifies the maximum number of transmit completion entries to process per transmit complete response event.Specifies the interval in which to inject a transmit complete complete discovery query on the response path. A value of zero disables the injection.Specifies whether to free the original transmit buffer as soon as possible or to delay freeing it until the associated completion notification has been received.Specifies the packet interval in which to inject a request to receive a transmit completion notification.Specifies the maximum number of transmits to perform on a given process thread.Specifies the maximum number of transmit packets that can be transmitted such that no more can be transmitted without first freeing transmitted packet resources back to the hardware.Specifies the maximum number of transmit complete entries to process before sending the hardware a notification that it can use the transmit complete entries that were processed.Specifies the maximum number of packets that can be placed on the transmit software queue.Enables and disables the using of an alternate MAC address.Specifies the alternate MAC address to use if using an alternate MAC address has been enabled.Specifies the maximum number of management completion entries to process per management complete response event.Specifies the maximum number of management complete entries to process before sending the hardware a notification that it can use the management complete entries that were processed.Specifies the desired number of NIC queues. The value specified will be used to set the desired of number transmit and the desired number of receive queues.Specifies that an additional device driver needs to be loaded. In the case of Ethernet, this attibute will specify the Ethernet Demuxer.Specifies the location of the device specific statistics program to execute when device specific statistic information is required.Specifies if the VPD on the adapter is missing.Specifies if the MAC address for the adapter in the Open Firmware Tree is missing.Specifies whether to perform a link reset during a suspend.Specifies the MSI type to use with interrupts.Specifies the maximum number of response events to process before sending the hardware a notification that it can use the response entries that were processed.Specifies the maximum number of response events that can be received such that no more can be received without first freeing response events.Enables and disables system tracing during config on paths where normal trace services have not yet been configured.Specifies the percentage of the maximum receive packets at which the available filled receive buffer entries are considered low.Enables and disables the performing of a firmware update.Specifies the path to the firmware update image.Specifies the type of reset to be used by default for the adapter.Specifies to pre-load additional drivers before the device driver.Specifies the config method is parallel safeSpecifies Dynamic DMA Window SupportSpecifies to perform partial checksum offloadSpecifies the max number of receive completion entries to process per receive complete response event.Specifies to configure and run in VNIC mode.Specifies the interval, in seconds, to delay link notification.Specifies if link delay notification should be performedSpecifies the interval, in seconds, to wait without a completion before triggering a transmit timeout.Specifies the type of reset to perform during an EEH recovery event.Specifies the interval, in seconds, to delay after an EEH PCI reset before proceeding with the EEH recovery.Specifies the interval, in miliseconds, to delay after an EEH config space restore before proceeding with EEH recovery.Specifies to bypass the enablement of PIO during EEH recovery.Specifies the interval, in microseconds, maximum time to spend waiting for the VPD to become ready for a read.Specifies the interval, in microseconds, amount of time to wait between each VPD ready check.Specifies the maximum number of interrupts to allocate.Specifies whether to send transmit packets on a receive thread.Specifies the action to be performed if a transmit TCP segmentation offload packet Maximum Segment Size (MSS) is less than mss_min_size.Specifies the Maximum Segment Size (MSS) minimum size.Specifies whether to post response interrupts to a kproc thread.Specifies the type of resets that can be performed during recoverySpecifies mode of operation of Enhanced Transmission Selection (ETS)Specifies Minimum number of Standard TxQs required to enable ETSSpecifies Minimum number of Priority TxQs required to enable ETSSpecifies the desired I/O page size for DMA transfers. This attribute specifies the desired I/O page size for DMA transfers. Sizes larger than 4KB require Dynamic DMA Window (DDW) support. If the desired DMA size is not possible or if this attribute is not present, the DMA page size will default to 4KB.This attribute is assigned an SRAD ID closest to the PCI BUS during config.Specifies to use affinity when allocating resources.This attribute is assigned an SRAD ID that is closest to the PCI device.Specifies to use affinity when allocating resources.If affinity is enabled, specifies if DMA memory affinity should be enabled.If affinity is enabled, specifies if memory affinity should be enabled.If affinity is enabled, specifies if process affinity should be enabled.Specifies whether to perform transmit processing on a kproc thread.Specifies whether to perform checksum and large send offload processing on tunnel packets.Specifies configuration state of device.This attribute is used to set what type of flow control should be used.This attributes defines the requested RDMA capability.This attributes defines the requested number of RDMA event queues.Hardware errorSoftware errorConfiguration errorTransmit errorEEH service errorEEH freeze detectedEEH recovery entryEEH recovery exitLogical link upLogical link downPhysical link upPhysical link downHardware temporary errorSoftware temporary errorACL violationDead requestDead entryDead exitRDMA Software errorRDMA Software temporary errorRDMA resource busyRDMA config error