/* IBM_PROLOG_BEGIN_TAG                                                   */
/* This is an automatically generated prolog.                             */
/*                                                                        */
/* bos72F src/bos/kernel/sys/POWER/mstsave.h 1.19.10.5                    */
/*                                                                        */
/* Licensed Materials - Property of IBM                                   */
/*                                                                        */
/* COPYRIGHT International Business Machines Corp. 1988,2016              */
/* All Rights Reserved                                                    */
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/* US Government Users Restricted Rights - Use, duplication or            */
/* disclosure restricted by GSA ADP Schedule Contract with IBM Corp.      */
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/* IBM_PROLOG_END_TAG                                                     */
/* @(#)30       1.19.10.5  src/bos/kernel/sys/POWER/mstsave.h, sysproc, bos72F, f2016_46B1 11/4/16 10:50:50 */
/*
 *   LEVEL 1,  5 Years Bull Confidential Information
 */


#ifndef _H_MSTSAVE
#define _H_MSTSAVE

#ifndef _H_STANDARDS
#include <standards.h>
#endif

/*
 *		Machine State Save Area -- R2 platform
 *
 *  Machine state save area. The fields for the segment registers,
 *  general purpose registers, and floating point registers are
 *  aligned to minimize the number of cache lines that contain them.
 *  Therefore this structure should be aligned on a cache line
 *  boundary.
 */

#include <sys/m_param.h>		/* for machine dependent defines*/
#include <sys/m_types.h>		/* for machine dependent typedefs */



/*
 * XPG4.2 requires structure elements to be defined such that they do not 
 * pollute the namespace.  Additional elements to these structures should
 * be added after the "#endif", and always prepended with "__".
 */

struct
#ifdef _ALL_SOURCE
mstsave
#else /* _ALL_SOURCE */
__mstsave
#endif /* _ALL_SOURCE */
{
#ifdef _ALL_SOURCE
	struct mstsave *prev;		/* previous save area		*/
	label_t		*kjmpbuf;	/* pointer to saved context	*/
	char		*stackfix;	/* stack fix pointer		*/
	char		intpri; 	/* interrupt priority		*/
	char		backt;		/* back-track flag		*/
	char		rsvd[2];	/* reserved			*/
	pid_t		curid;		/* copy of curid		*/

	int		excp_type;	/* exception type for debugger	*/
	ulong_t		iar;		/* instruction address register	*/
	ulong_t		msr;		/* machine state register	*/
	ulong_t		cr;		/* condition register		*/
	ulong_t		lr;		/* link register		*/
	ulong_t		ctr;		/* count register		*/
	ulong_t		xer;		/* fixed point exception	*/
	ulong_t		mq;		/* multiply/quotient register	*/
 	ulong_t		tid;		/* tid register			*/
	ulong_t		fpscr;		/* floating point status reg	*/
	char		fpeu;		/* floating point ever used	*/
	char            fpinfo;         /* floating point status flags  */
	uchar		fpscr24_31;	/* bits 24-31 of 64-bit FPSCR   */
	char            pad[1];         /* res - pad to dword boundary  */
	ulong_t         except[5];	/* exception structure          */
	char            pad1[4];        /* old bus field                */
	ulong_t         o_iar;          /* old iar (for longjmp excpt)  */
	ulong_t         o_toc;          /* old toc (for longjmp excpt)  */
	ulong_t         o_arg1;         /* old arg1 (for longjmp excpt) */
	ulong_t		excbranch;	/* if not NULL, address to branch
					 * to on exception.  Used by
					 * assembler routines for low
					 * cost exception handling*/
	ulong_t         fpscrx;         /* software extension to fpscr  */
	ulong_t         o_vaddr;        /* Saved vaddr for vmexception  */
	ulong_t		cachealign[7];	/* reserved			*/
	adspace_t	as;		/* segment registers            */
	ulong_t		gpr[_NGPRS];	/* general purpose registers	*/
	double		fpr[_NFPRS];	/* floating point registers	*/
#else /* _ALL_SOURCE */
	struct __mstsave *__prev;	/* previous save area		*/
	label_t		*__kjmpbuf;	/* pointer to saved context	*/
	char		*__stackfix;	/* stack fix pointer		*/
	char		__intpri; 	/* interrupt priority		*/
	char		__backt;	/* back-track flag		*/
	char		__rsvd[2];	/* reserved			*/
	pid_t		__curid;	/* copy of curid		*/

	int		__excp_type;	/* exception type for debugger	*/
	ulong_t		__iar;		/* instruction address register	*/
	ulong_t		__msr;		/* machine state register	*/
	ulong_t		__cr;		/* condition register		*/
	ulong_t		__lr;		/* link register		*/
	ulong_t		__ctr;		/* count register		*/
	ulong_t		__xer;		/* fixed point exception	*/
	ulong_t		__mq;		/* multiply/quotient register	*/
 	ulong_t		__tid;		/* tid register			*/
	ulong_t		__fpscr;	/* floating point status reg	*/
	char		__fpeu;		/* floating point ever used	*/
	char            __fpinfo;       /* floating point status flags  */
	uchar_t		__fpscr24_31;	/* bits 24-31 of 64-bit FPSCR   */
	char            __pad[1];       /* res - pad to dword boundary  */
	ulong_t         __except[5];	/* exception structure          */
	char            __pad1[4];      /* old bus field                */
	ulong_t         __o_iar;        /* old iar (for longjmp excpt)  */
	ulong_t         __o_toc;        /* old toc (for longjmp excpt)  */
	ulong_t         __o_arg1;       /* old arg1 (for longjmp excpt) */
	ulong_t		__excbranch;	/* if not NULL, address to branch
					 * to on exception.  Used by
					 * assembler routines for low
					 * cost exception handling*/
	ulong_t         __fpscrx;       /* software extension to fpscr  */
	ulong_t         __o_vaddr;      /* Saved vaddr for vmexception  */
	ulong_t		__cachealign[7];/* reserved			*/
	adspace_t	__as;		/* segment registers            */
	ulong_t		__gpr[_NGPRS];	/* general purpose registers	*/
	double		__fpr[_NFPRS];	/* floating point registers	*/
#endif /* _ALL_SOURCE */
};

#ifdef _ALL_SOURCE
/*
 * This structure provides the 64-bit and 32-bit kernel with a size 
 * invariant view of a 32-bit mstsave.
 */
struct mstsave32
{
	__ptr32		prev;		/* previous save area		*/
	__ptr32		kjmpbuf;	/* pointer to saved context	*/
	__cptr32	stackfix;	/* stack fix pointer		*/
	char		intpri; 	/* interrupt priority		*/
	char		backt;		/* back-track flag		*/
	char		rsvd[2];	/* reserved			*/
	int		curid;		/* copy of curid		*/

	int		excp_type;	/* exception type for debugger	*/
	uint_t		iar;		/* instruction address register	*/
	uint_t		msr;		/* machine state register	*/
	uint_t		cr;		/* condition register		*/
	uint_t		lr;		/* link register		*/
	uint_t		ctr;		/* count register		*/
	uint_t		xer;		/* fixed point exception	*/
	uint_t		mq;		/* multiply/quotient register	*/
 	uint_t		tid;		/* tid register			*/
	uint_t		fpscr;		/* floating point status reg	*/
	char		fpeu;		/* floating point ever used	*/
	char            fpinfo;         /* floating point status flags  */
	uchar_t		fpscr24_31;	/* bits 24-31 of 64-bit FPSCR   */
	char            pad[1];         /* res - pad to dword boundary  */
	uint_t		except[5];	/* exception structure          */
	char            pad1[4];        /* old bus field                */
	uint_t	     	o_iar;          /* old iar (for longjmp excpt)  */
	uint_t	     	o_toc;          /* old toc (for longjmp excpt)  */
	uint_t	     	o_arg1;         /* old arg1 (for longjmp excpt) */
	uint_t		excbranch;	/* if not NULL, address to branch
					 * to on exception.  Used by
					 * assembler routines for low
					 * cost exception handling*/
	uint_t	     	fpscrx;         /* software extension to fpscr  */
	uint_t     	o_vaddr;        /* Saved vaddr for vmexception  */
	uint_t		cachealign[7];	/* reserved			*/
	adspace32_t	as;		/* segment registers            */
	uint_t		gpr[_NGPRS];	/* general purpose registers	*/
	double		fpr[_NFPRS];	/* floating point registers	*/
};
#endif

/* 
 * Values for mstsave.fpeu
 */

#define _FP_NEVER_USED	0		/* floating point never used	*/
#define _FP_USED	1		/* floating point used	        */

/*
 * Values/fields of mstsave.fpinfo
 *
 * - programming note: This field is intended to be an array of state bits.
 *                     All code accessing `fpinfo' should use a mask.
 */

/* These define how fpinfo is interpreted for "Classic" Power platforms. */
#define _FP_IMP_INT	0x01            /* run in imprecise mode        */
#define _FP_SYNC_TASK	0x08            /* if set, run task at MSR(FE)=1*/

/* these define how fpinfo is interpreted for PowerPC platforms */
#define _PPC_OFF 	0x0		/* FP trapping OFF */
#define _PPC_IMP 	0x1		/* FP trapping Imprecise mode */
#define _PPC_IMP_REC 	0x8	/* FP trapping Imprecise recoverable mode */
#define _PPC_PRECISE 	0x9		/* FP trapping Precise mode */

/* This bit is used to indicate that a floating point interrupt
   was imprecise */
#define _FP_INT_TYPE	0x02		/* type of fp interrrupt        */

#define _FP_SYNC_IMP_S	8		/* shift between bits in FPINFO & MSR */

/*
 *  interrupt handler mstsave and stack pool
 */
#define _FRAMESIZE		0x5000	/* mstsave stack frame size */

/* size of V=R pmap stack. 2x to support 1 level deep recursion.
 * Keep these defines in sync with mstsave.table
 */
#ifdef DEBUG
#define _PMAP_STK_FRAME		 (4096)
#else
#define _PMAP_STK_FRAME		 (3328)
#endif
#define _PMAP_STK_FRAMES	(2)	/* 2 frames per CPU */
#define	_PMAP_STK_SIZE		(_PMAP_STK_FRAME * _PMAP_STK_FRAMES)

#define _PMAP_OVBUF_SIZE	 768     /* PMAP stack overflow buf size */
#define _PMAP_OVBUF_CHAR	 0x11    /* fill character for overflow buf */
#define _PMAP_OVBUF_ULL		 0x1111111111111111ULL  /* fill ULL for buf */

/* size of SLB flih save area
 * 12 registers, 1 level of recursion, 1 level for dump
 */
#define _SLB_SAVE_FRAME		 (12)	/* 12 registers per frame */
#define	_SLB_SAVE_FRAMES	 (3)	/* 3 frames per CPU */
#define _SLB_SAVE_SIZE		 (_SLB_SAVE_FRAME * _SLB_SAVE_FRAMES)

extern char __pmap_stack[];

/* There may only be 11 frames if recovery is disabled
 */
#define _NUMBER_OF_FRAMES        13     /* Maximum Frames per MST stack */
#define _NUMBER_OF_RECOVERY_FRAMES 2	/* Frames used for kernel recovery */

/*
 * AMR stack frame related constants
 */
#define _AMRSTACKSIZE		4096	/* bytes */
#define _AMRSTACKFRAMESZ	16	/* bytes -- 8 byte AMR, 8 byte lr */

#ifdef _ALL_SOURCE
#define FP_NEVER_USED		_FP_NEVER_USED
#define FP_USED			_FP_USED
#define FP_IMP_INT		_FP_IMP_INT
#define FP_SYNC_TASK		_FP_SYNC_TASK
#define PPC_OFF			_PPC_OFF
#define PPC_IMP			_PPC_IMP
#define PPC_IMP_REC		_PPC_IMP_REC
#define PPC_PRECISE		_PPC_PRECISE
#define FP_INT_TYPE		_FP_INT_TYPE
#define FP_SYNC_IMP_S		_FP_SYNC_IMP_S
#define FRAMESIZE		_FRAMESIZE
#define NUMBER_OF_FRAMES	_NUMBER_OF_FRAMES
#define NUMBER_OF_RECOVERY_FRAMES _NUMBER_OF_RECOVERY_FRAMES
#define PMAP_STK_SIZE		_PMAP_STK_SIZE
#define PMAP_OVBUF_SIZE		_PMAP_OVBUF_SIZE
#define PMAP_OVBUF_CHAR		_PMAP_OVBUF_CHAR
#define PMAP_OVBUF_ULL		_PMAP_OVBUF_ULL
#define SLB_SAVE_SIZE		_SLB_SAVE_SIZE
#define pmap_stack		__pmap_stack
#define AMRSTACKSIZE		_AMRSTACKSIZE
#define AMRSTACKFRAMESZ		_AMRSTACKFRAMESZ
#endif /* _ALL_SOURCE */

#ifdef _KERNEL
#ifdef __64BIT_KERNEL

#define _NTSEGS 4			/* number of temporary segments */
#define EYEC_KMSTSAVE	0x6B6D737473614D4CUL	/*  "kmstsaML" */

/*
 * Do not change this structure without carefully examining cache alignment
 */
struct kmstsave	{
	struct kmstsave	*prev;		/* previous save area		*/
	void		*stackfix;	/* stack fix pointer		*/
	label_t		*kjmpbuf;	/* pointer to saved context	*/
	ulong_t		excbranch;	/* if not NULL, address to branch */

	/*
	 * intpri and backt are accessed as one short in places
	 */
	char		intpri; 	/* interrupt priority		*/
	char		backt;		/* back-track flag		*/
	ushort_t	flags;		/* misc. flags - defines below	*/
	uint_t		mq;		/* Power Emulation only		*/

	ulong_t		msr;		/* machine state register	*/
	ulong_t		iar;		/* instruction address register	*/
	ulong_t		lr;		/* link register		*/
	ulong_t		ctr;		/* count register		*/
	uint_t		cr;		/* condition register		*/
	uint_t		xer;		/* fixed point exception	*/

	uchar		kfpscr0_7;	/* upper 32-bits of 64-bit fpscr*/
	uchar		kfpscr8_15;
	uchar		kfpscr16_23;
	uchar		kfpscr24_31;
	uint_t		fpscr;		/* floating point status reg	*/
	uint_t		fpscrx;		/* software extension to fpscr  */
	/*
	 * fpowner and fpeu are accessed as on "short" in places
	 */
	char		fpowner;	/* floating point state in regs */
	char		fpeu;		/* floating point ever used	*/
	char            fpinfo;         /* floating point status flags  */
	char		intnesting;	/* interrupt-nesting depth.	*/
	/*
	 * alloc is accessed as a word or even a doubleword in places
	 */
	ushort_t	alloc;		/* temporary segment allocation */
	char		alloc_pad[6];	/* do not use this storage */
	char		no_pfault;	/* 1 => page faults not allowed	*/
	char		vmxstate;	/* VMX/VSX state bits */ 

	/* 
	 * Values for mstsave.vmxstate; logically or'ed together
	 */
#define _VMXUSED	1 /* VMX used but not active */
#define _VMXOWNER	2 /* VMX in use (owner) */
#define _VSXUSED	4 /* VSX used but not active */
#define _VSXOWNER	8 /* VSX in use (owner) */

	/*
	 * We count the number of disabled ticks here.
	 * Because big ticks and slow ticks can degrade the accuracy
	 * of what we're doing, we also count the number of actual
	 * decrementer interrupts involved.  This lets us require
	 * not only that int_ticks exceed a threshold, but also that
	 * a minimum number of physical interrupts were taken.
	 *
	 * Because we don't want to change the size of the mst in the
	 * 32 bit kernel version below, we subdivide this field.
	 * The top DISABLEMENT_EVENT_BITS bits of int_ticks will be
	 * used as the event count, while the low-order
	 * DISABLEMENT_TICK_BITS bits will be the timer.
	 */
	ushort_t	int_ticks;	/* count consecutive ticks	*/

	/* Transactional Memory state, context, and status  bits: */
	char		tmstate;
	char		tmcontext;

	/* 
	 * Values for mstsave.tmstate; logically or'ed together:
	 */
#define _TMUSED      1 /* TM used but not active */
#define _TMOWNER     2 /* TM in use (owner)      */

	/*
	 * Values for mstsave.tmcontext; logically or'ed together:
	 */
#define _TMNOCONTEXT 0 /* disown_tm has not been called on this thread */
#define _TMCONTEXT   1 /* disown_tm has been called when in            *
                        * transactional or suspended state,            *
                        * resulting in the transaction being failed    *
                        * and the Checkpoint and TM state being saved  *
                        * onto the stack including the TM SPRs.        */
#define _TMTRANS     2 /* If _TMCONTEXT and _TMTRANS are both set,     *
                        * then state was saved when the thread was in  *
                        * transactional state; otherwise,              *
                        * if only _TMCONTEXT is set, then state was    *
                        * saved when thread was in suspended state.    */
#define _TMSPRSONLY  4 /* Indicates that the TM SPRs were saved off    *
                        * when disown_tm has been called when in       *
                        * non-transactional state. This should not be  *
                        * set when _TMCONTEXT is set.                  */
/*      RESERVED     8  * Reserved for internal usage.                 */	

	char		prevowner;	/* Indicates ownership of      *
					 * of the FP, VMX, VSX units   *
					 * at the time of the last     *
					 * pre-emption.		       */

	/*
	 * Values for mstsave.prevowner; logically or'ed together:
	 */
#define _PREVOWNER_FP  1 /* FP owned at last pre-emption.	       */
#define _PREVOWNER_VMX 2 /* VMX owned at last pre-emption.	       */
#define _PREVOWNER_VSX 4 /* VSX owned at last pre-emption.	       */


	char		pad2[1];

	/*
	 * Fields supporting the AMR stack.
	 */
	char		*amrstackhigh;	/* high + 1 address */
	char		*amrstacklow;	/* low (end) address */
	char		*amrstackcur;	/* current frame address */
	char		*amrstackfix;	/* stackfix pointer */

	/* sr and att_lr should stay in the same cacheline */
	ulong_t		sr[_NTSEGS];	/* temp att handles		*/
	ulong_t		att_lr[_NTSEGS];/* temp att link register	*/

	ulong_t         except[5];	/* exception structure          */
	ulong_t         o_vaddr;        /* Saved vaddr for vmexception  */
	ulong_t         o_iar;          /* old iar (for longjmp excpt)  */
	ulong_t         o_toc;          /* old toc (for longjmp excpt)  */
	ulong_t         o_arg1;         /* old arg1 (for longjmp excpt) */
	void            *kmst_krlockp;  /* pointer to spinning krlock.  */
	uint_t		kvrsave;	/* VMX VRsave register          */
	int		excp_type;	/* exception type               */
	int             capi :  1;      /* CAPI process                 */
        int             pad3 : 31;      /* Reserved                     */
        uint_t		pad4;
	ulong_t		amr;		/* AMR (only in 64-bit kernel)	*/
	long long	save_cfar;	/* CFAR register save area      */

	ulong_t		gpr[_NGPRS];	/* general purpose registers	*/

	ulong_t		msteyec;	/* eyecatcher for MST		*/
	void		*rmgrwa;	/* recovery manager work area	*/
	ulong_t		kstackhigh;	/* Bottom of kernel stack + 1   */
	uint_t		kstacksize;     /* Size of kernel stack         */
        uint_t          ksave_hw_fru_id; /* CPU Identification part 1    */
        uint_t          ksave_hw_cpu_id; /* CPU Identification part 2    */
	uint_t		pspb;		/* Problem State Prio Boost Reg	*/
	ulong_t		dscr;		/* Data Streams Control Reg	*/
	ulong_t		fscr;		/* Facility Status Control Reg	*/
	uint_t		ti_code;	/* TM Code	                    */
        char            pad[4];       /* allow for future use without
                                         * increasing kmstsave size */
	/* ----------------- cache line boundary -----------------*/
        /*
         * Recovery fields 
	 * 
	 * There is a dependency that frrovcnt, frrbarrcnt, frrstatic, frrmask
	 * and callrmgr are in the same 8-byte word.  RTEC code and mst
	 * initialization code assumes it can test/set all fields with one
	 * 64-bit operation.  The combined 8-bytes is refered to as
	 * mstfrrstatus by assembley code.
	 *
	 * Note: When a uthread is copied in swap_uthread(), the 
	 * recovery related fields from frrstart to the end of
	 * frr_shrfp are not copied to the destination uthread's ut_save.  
         */
        char            *frrstart;      /* start of FRR stack (high) */
        char            *frrend;        /* end of FRR stack (low) */
        char            *frrcur;        /* current entry on FRR stack */
	char		frrrsvd1[6];    /* reserved */
	ushort_t	kjmpfrroff;	/* recovery stack current entry 
					 * offset when the kjmpbuf label_t 
					 * was created */
        ushort_t        frrovcnt;       /* count of overflow FRRs */
        ushort_t        frrbarrcnt;     /* barrier count for current FRR */
        ushort_t        frrstatic;      /* static FRR id */
        uchar_t         frrmask;        /* recovery mask byte for use by 
                                         * the recovery manager */
        uchar_t         callrmgr;       /* recovery manager to be called 
                                         * when mst finishes interrupt 
                                         * processing */

        /*
         * The following 8 bytes are immediately before the shared
         * footprint area and must remain there.  They have a common 
         * mapping with corresponding fields in FRR stack entries.   
         * The address of the shared footprint area (frr_shrfp) is returned
         * to FRR users and the FRR users reference and store into
         * these fields.  
         */     
        uint_t          frr_shrftptid;  /* shared footprint ID */
        ushort_t        frr_shrbarrcnt; /* barrier count in frr entries */
        char            frr_shrrsvd1;   /* reserved in frr entries */ 
        char            frr_shrmask;    /* mask byte in frr entries */
        
        char            frr_shrfp[80];  /* shared footprint area */
    
        /* ----------------- cache line boundary -----------------*/
};

#else	/* !__64BIT_KERNEL */
#define	NUM_KERNEL_BATS	3		/* number of BATS used in kernel mode */
struct kmstsave	{

	struct kmstsave	*prev;		/* previous save area		*/
	label_t		*kjmpbuf;	/* pointer to saved context	*/
	char		*stackfix;	/* stack fix pointer		*/
	char		intpri; 	/* interrupt priority		*/
	char		backt;		/* back-track flag		*/
	uchar		flags;		/* misc. flags - defines below	*/
	/*
	 * We count the number of disabled ticks here.
	 * Because big ticks and slow ticks can degrade the accuracy
	 * of what we're doing, we also count the number of actual
	 * decrementer interrupts involved.  This lets us require
	 * not only that int_ticks exceed a threshold, but also that
	 * a minimum number of physical interrupts were taken.
	 *
	 * Because we don't want to change the size of the mst here,
	 * the top two bits of int_ticks will be used as the event count,
	 * while the low-order 6 bits will be the timer.
	 */
	char		int_ticks;	/* count consecutive ticks	*/

	pid_t		curid;		/* copy of curid		*/

	int		excp_type;	/* exception type for debugger	*/
	ulong_t		iar;		/* instruction address register	*/
	ulong_t		msr;		/* machine state register	*/
	ulong_t		cr;		/* condition register		*/
	ulong_t		lr;		/* link register		*/
	ulong_t		ctr;		/* count register		*/
	ulong_t		xer;		/* fixed point exception	*/
	ulong_t		mq;		/* multiply/quotient register	*/
 	ulong_t		tid;		/* tid register			*/
	/* floating point related information now in uthread struct */
	ulong_t		fpscr;		/* floating point status reg	*/
	char		fpeu;		/* floating point ever used	*/
	char            fpinfo;     	/* floating point status flags  */
	char            no_pfault;	/* 1 => page faults not allowed	*/
	ulong_t         except[5];	/* exception structure          */
	ulong           mstext;         /* offset to mstsave64 or NULL */

	ulong_t         o_iar;          /* old iar (for longjmp excpt)  */
	ulong_t         o_toc;          /* old toc (for longjmp excpt)  */
	ulong_t         o_arg1;         /* old arg1 (for longjmp excpt) */

	ulong_t		excbranch;	/* if not NULL, address to branch
					 * to on exception.  Used by
					 * assembler routines for low
					 * cost exception handling*/
	ulong_t         fpscrx;		/* software extension to fpscr  */
	ulong_t         o_vaddr;        /* Saved vaddr for vmexception  */
	ulong_t		ioalloc;	/* ioallocation mask */
	union _KMSTSAVE_KMSTU {
	    struct {
		ulong_t batu;
		ulong_t batl;
	    } dbats[NUM_KERNEL_BATS];	/* Save area for bats		*/
	    struct _KMSTSAVE_S1 {	/* BATS and VMX/DFP dont coexist*/
					/* on any processor             */
		uint_t	vrsave;		/* VMX VRsave register          */
		uchar	fpscr24_31;	/* bits 24-31 of 64-bit FPSCR   */
		char	pad[3];		/* unused                       */
	    } s1;
	} kmstu;			
#define kvrsave		kmstu.s1.vrsave
#define kfpscr24_31	kmstu.s1.fpscr24_31
#define kdbats		kmstu.dbats

	adspace_t	as;		/* segment registers            */
	ulong_t		gpr[_NGPRS];	/* general purpose registers	*/
};


#endif /* __64BIT_KERNEL */

extern struct kmstsave lastbackt[];
/* Values for kmstsave.flags field */
#define KMST_FLAGS_COREX	0x100
#define KMST_FLAGS_DEV_KMEM	(unsigned char)0x80
#define KMST_FLAGS_64BIT	0x40
#define KMST_FLAGS_KJMPBUF_SPCL	0x20
#define KMST_FLAGS_DPS		0x10
#ifdef __64BIT_KERNEL
#define KMST_FLAGS_NOPREEMPT	0x08
#endif /* __64BIT_KERNEL */
#define KMST_FLAGS_THRPGIO_PROT 0x04
#define KMST_FLAGS_SPARSE_SEG   0x02
#define KMST_FLAGS_XMGETFL	0x01

/*
 * The following is used in mst_checker.  These must be updated if
 * flags are added/removed
 */
#define MST_CHECKER_FLAGS	KMST_FLAGS_COREX | KMST_FLAGS_DEV_KMEM | \
				KMST_FLAGS_64BIT | KMST_FLAGS_KJMPBUF_SPCL | \
				KMST_FLAGS_DPS | KMST_FLAGS_NOPREEMPT | \
				KMST_FLAGS_THRPGIO_PROT | \
				KMST_FLAGS_SPARSE_SEG | KMST_FLAGS_XMGETFL

/* extension to mstsave for 64-bit processes
 * this structure and context64 and ptxsprs are related. context64
 * begins with mstsave64 but overlays the asr field with (fpscr, fpscrx).
 * ptxsprs consists of the fields msr thru fpscrx. 
 */
struct mstsave64 {
	unsigned long long	gpr[_NGPRS];	/* 64-bit gprs */	
	unsigned long long	msr;		/* msr */
	unsigned long long	iar;		/* iar */
	unsigned long long	lr;		/* LR */
	unsigned long long	ctr;		/* CTR */
	ulong		cr;			/* CR */
	ulong		xer;			/* XER */
	unsigned long long	asr;		/* address space register value */
	unsigned long long	except;		/* exception address */
};

/* offsets of various fields in struct mstsave64 */
#define OFF_GPR    ((uint) &((struct mstsave64 *)0)->gpr[0]) 
#define OFF_MSR    ((uint) &((struct mstsave64 *)0)->msr) 
#define OFF_IAR    ((uint) &((struct mstsave64 *)0)->iar) 
#define OFF_LR     ((uint) &((struct mstsave64 *)0)->lr) 
#define OFF_CTR    ((uint) &((struct mstsave64 *)0)->ctr) 
#define OFF_CR     ((uint) &((struct mstsave64 *)0)->cr) 
#define OFF_XER    ((uint) &((struct mstsave64 *)0)->xer) 

#endif /* _KERNEL */
	

#endif /*_H_MSTSAVE*/


